At least some example embodiments of the inventive concepts relate to a duty cycle corrector (DCC), and more particularly, to a DCC with enhanced operation performance, a semiconductor device including the same, and a method of operating the duty cycle corrector.
Generally, semiconductor devices transmit or receive data therebetween at a high speed in synchronization with a clock signal. A DCC for adjusting a duty (i.e., duty cycle) of a clock signal to about 50% may be used for enhancing the characteristic of the clock signal supplied to a semiconductor device.
The DCC may include a charge pump including an output terminal to which one or more capacitors are connected, and sense an output of the charge pump to adjust a duty of a clock signal. The characteristics of the DCC are degraded due to various causes such as a develop time caused by the capacitors or ripple caused by a gain of the charge pump. Characteristic degradation which occurs in a duty cycle correction operation causes degradation in whole performance of a semiconductor device.